Stereo 3W Audio Power Amplifier MAX9760
USA and the United States the letter produced MAX9760 is a 3W (@ RL = 3Ω) bridge-tied load (BTL) power amplifier and stereo speakers 200mW (@ RL = 16Ω) stereo headphone amplifier head contains single IC. The device with a headphone sensing the first set, 2:1 input multiplexer adapter, proprietary a click sound with Gurkha Li inhibition of other features. 100dB at 1kHz under ultra-high power supply rejection ratio (PSRR), therefore, MAX9760 in non-linear regulator 4.5 ~ 5.5V single power supply noise work. The ultra-low 0.002% (THD + N) can guarantee clean audio signal amplification and low distortion. MAX9760 Other features include: 4mV low output offset voltage, 13mA low 10μA quiescent supply current and shutdown current. In addition, the device also allows the output mute function enabled or closing fast.
Stereo 3W Audio Power Amplifier MAX9760
MAX9760 headphone sense input detects the presence of the headphone jack, It can connect to speaker mode amplifier, but also can automatically connect the headphone amplifier mode. The amplifier gain can be set externally. 2:1 input multiplexer adapter allows you to select multiple audio sources. Another multiplexer network through an external equalizer option, can also be used on the speaker frequency response limit of compensation. MAX9760's various functions are available through the serial data line (SDA) and serial clock line (SCL) consisting of, and I2C/SMBus compatible 2-wire serial interface control.
MAX9760 family of devices MAX9761/2/3 with the same as a 28-pin QFN package or 28-pin TSSOP-EP package, and their pin arrangement shown in Figure 1.
MAX9760 application areas are mainly notebook PCs, small flat panel PCs, portable DVD player, PC audio peripherals (and Camcorders), etc..
Stereo 3W Audio Power Amplifier MAX9760
2 pin internal structure and function
MAX9760 power amplifier and stereo speakers in a stereo single-ended connection (SE) contains the first headphone amplifier, a 2:1 input multiplexer, headphone transducer and a click sound with Gurkha Li suppression circuitry. Figure 2 MAX9760's internal structure, Table 1 shows the MAX9760 pins function.
Table 1 MAX9760 pins function
Pin
Function
QFN Package TSSOP package name
1 26 SDA bidirectional serial data I / O
2 27 INT μC interrupt output
3 28 VDD Power
4 1 SVDD standby power. The pin connected to standby power, or through a Schottky diode and a 220F capacitor connected to the ground; or if necessary without a click operation, that will short circuit to VDD pin
5 2 INL1 left channel input 1
6 3 INL2 into the left channel input 2
7 4 GAINLA left channel gain settings A
8 5 GAINLB left channel gain setting B
9,13,23,27 6,10,20,24 PGND power ground
10 7 OUTL + days left channel bridge amplifier output, as well as the left-channel headphone amplifier output
11,25 8,22 PVDD smooth power output amplification
12 9 OUTL-left channel bridge amplifier negative output
14 11 SHDN active-low close, normal operation of the pin connected to VDD
15 12 ADD address selection. To logic 1, the set address LSB to 1; to logic 0, set LSB to 0
16 13 HPS headphone sensing input. Logic high will enable IC for SE headphone amplifier; a logic low will enable IC for BTL speaker amplification along
17 14 BIAS DC bias bypass, the pin should be connected to a capacitor to ground
18 15 GND ground
19 16 INR1 the right channel input 1
20 17 INR2 the right channel input 2
21 18 GAINRB the right channel gain settings A
22 19 GAINRB the right channel gain setting B
24 21 OUTR + right-channel bridge amplifier is the output, as well as the right-channel headphone amplifier output
26 23 OUTR-right-channel bridge amplifier negative output
28 25 SCL Serial Clock Line
3 Works
3.1 Input Multiplexer
MAX9760's internal 2:1 input multiplexer allows the input in the choice between the two stereo sources. More than two way converters controlled by control register bit 1. One of the logic low to select the input IN_1, another logic high to select the input IN_2. When the audio source to the IC from the IN_1 and IN_2 feet when connecting two differential input resistance, the gain from 2 to 4. In addition, the input multiplexer also allows the speaker to speaker balanced network converted into the signal path.
Stereo 3W Audio Power Amplifier MAX9760
3.2 headphone headset sensor to sensor input with
MAX9760 the HPS pin can HPSD-bit enabled. Meanwhile, the device can automatically detect HPSD mode or fixed mode operation. HPS set as Table 2.
Table 2 HPS set
Input mode
Gain path
HSPD HPS speaker / headset (SPKR / HP)
0 0 × BTL select GAIN A pathway
0 1 × SE choice GAIN B pathway
1 × 0 BTL gain access from the register (02h) GAINAB control Choice
1 × 1 SE gain access from the register (02h) Choice of control
In the HPS feet plus a lower voltage enables the device 0.7VDD work in speaker mode. When the HPS pin voltage is higher than 0.9VDD, the device will enter headset mode, the same time will mute the speaker amplifier. In order to achieve automatic headset detection, HPS can be connected to the three-foot headphone control pin socket, as shown in Figure 3. In this way, no headset appears, can the R1 and R2 resistor divider to generate a lower voltage applied to the IC 0.7VDD the HPS pin to the IC is set to speaker mode, the same time, gain setting can be preset to GAINA. When the headphone plug when inserted into the ears of the control feet off from the contact, HPS pin through R1 to connect to VDD, to the IC to set the headset mode, then the gain setting is preset at GAINB. When the IC in the speaker mode, the resistor R3 is used to prevent the audio signal coupled to the HPS feet.
4 Digital Interface operation
MAX9760's SDA and SCL and I2C/SMBus compatible. Through SDA and SCL can MAX9760 and 400kHz clock rate of the host (a typical micro-controller) two-way communication. At this point MAX9760 only a transmit / receive from the device, it depends on master generates the clock signal. Usually started by the host data and clock transmission on the bus by the host by launching the appropriate address (followed by a command or data word) to the MAX9760. Each firing sequence from a start condition and stop condition of a component. Word length is 8 bits, and always follow after a clock pulse response.
4.1 Start and stop conditions
The host by issuing a start condition to start the communication. Start condition occurs when the SDA is high in the SCL falling edge, while the stop condition in the SCL is high, determined by the rising edge of SDA. Specifically shown in Figure 4.
Stereo 3W Audio Power Amplifier MAX9760
4.2 confirm (ACK) bit
Ninth ACK normally attached to any 8-bit data word. MAX9760 receiving each address or data, will have an ACK bit.
Stereo 3W Audio Power Amplifier MAX9760
4.3 from the address
Bus master by sending a start condition and 7 from the address Figure 5 and host. Idle, IC will wait for a later start from the address condition. Address word of the least significant bit LSB is read / write R / W bit, R / W to 0, select Add; R / W to 1, select Read. When the receiver to the appropriate address, MAX9760 will send an ACK bit. MAX9760 has a factory before the factory / user programmed address. Figure 5 shows the format command from the address. Users can set the address ADD feet back in place A6 ~ A0 A0 and A1. In other words, the ADD are connected to VDD, GND, SCL, or SDA feet, respectively redefine the last two from the address A0 and A1, specifically listed in Table 3.
Table 3 I2C slave address
ADD connect I2C address
GND 1001000
VDD 1001001
SDA 1001010
SCL 1001011
4.4 Write data format
MAX9760 is equipped with mute (MUTE) register, turn off (SHDN) registers and control registers three registers. Which is a quiet setting mute status register read / write registers. The register bit 3 (MUTEL) and bit 4 (MUTER) were used to control the left and right channels. Closed register is to control the device power-state read / write registers. The bit 0 is logic high, close the IC, while in office from 2 to 7, a logic high will reset all registers to default settings. The third is the control register, which is to determine the device configuration of a read / write registers, mainly used to configure the IC.
4.5 Read data format
In read mode (R / W = 1) state, MAX9760 will select the contents of the register write bus, this time the data will flow the opposite direction behind the address and confirmed that the host will include reading, including the only status register read all internal registers.
4.6 Interrupt output
MAX9760 interrupt output (INT) is usually triggered when the state changes HPS. During normal operation, from socket inserted or removed, the system will be detected by HPS to make INT set to high.
Figure 6 MAX9760 Typical Application Circuit
5 Application Circuit
MAX9760 typical application circuit shown in Figure 6. Map MAX9760 BTL speaker amplifier for the stereo and the first set SE headphone amplifier. MAX9760 digital interface connected to the micro-controller, start the bus by the micro-controller data. MAX9760 left / right channel input signal from the codec, in INL2 and INR2 signal input channels to set a high pass filter (HPF). Each channel has two gain (A and B) to choose from: in the speaker mode to select the gain A (add B non-performance); in headset mode selection gain B (A default gain). RIN input resistance can be used to determine the input amplifier gain (AVIN =- 10kΩ/RIN), the amplifier output pin (OUTL + and OUTR +) and the gain set point (GAINL A / B and GAINRA / B) between the feedback resistor RF for the set given output amplifier gain (AVOUT =- RF/10kΩ). The total gain from the RF and the RIN decision:
AV = AVIN × AVOUT = RF / RIN
In headset mode, high frequency and effective feedback resistance REFF = RF1 × RF2 / (RF1 + RF2) when, CF can be considered as short-circuit. For RF1 and RF2, CF consisting of bass boost circuit, the low frequency end of CF can be regarded as open (at this time REFF = RF1).